Semiconductor component in a wafer assembly

ABSTRACT

Semiconductor components in a wafer assembly, in which the components are connected to a frame by means of in each case one holder and are formed from the same silicon wafer. The holder connects the respective component to the frame on one side and has a desired breaking point. The desired breaking point is designed as a V-shaped groove, the surfaces of which form crystal planes. According to the method, the patterning for production of the holder takes place on the wafer back surface, with subsequent wet chemical anisotropic etching of the V-groove. In this way, the holder is produced independently of the processing of the wafer front surface, and when the semiconductor component is removed a defined broken edge is formed without there being any risk of the semiconductor component being damaged.

CROSS-REFERENCE TO RELATED APPLICATION

[0001] The instant application is a divisional of U.S. patentapplication Ser. No. 10/178,636 filed on Jun. 21, 2002 which iscurrently pending.

BACKGROUND OF THE INVENTION

[0002] Semiconductor components in a wafer assembly, in which thecomponents are connected to a frame by means of in each case one holderand are formed from the same silicon wafer. The invention also relatesto a method for fabricating semiconductor components in a wafer assemblyof this type.

[0003] During fabrication of semiconductor components from a siliconwafer ((100) silicon wafer), the individual components, together with aframe and a holder which connects the component to the frame, areproduced from a single silicon wafer. The holder comprises a bar whichextends transversely across the component and is fixed to the frame onboth sides. These bars, the only purpose of which is to fix thecomponents to the frame, are fabricated by photolithographic patterningof the wafer front surface with subsequent dry or wet chemical etchingprocesses for shaping. The opening up of the components and of theframe, i.e. the separation of the components from the frame, is effectedby photolithographic patterning of the wafer front surface and/or thewafer back surface with subsequent dry or wet chemical etching processesfor shaping. The component itself is then broken out of the frame byapplying pressure to the component until the bar breaks. Alternatively,the bar may also be broken by the application of a torsional load byrotating the component out of the wafer plane.

[0004] In this method of fabricating the semiconductor component, thebars are fabricated from the wafer front surface, so that all thefabrication and machining processes carried out on the semiconductorcomponent have to be adapted to the fabrication process used for thebars. Consequently, there is a considerable interdependency betweenfabrication of the bars and processing of the semiconductor component.There are generally no crystallographically preferred breaking edges,since these require additional process steps. Therefore, during thebreaking-out operation, there are no reproducible broken edges formed onthe bars, or the bars may splinter when the semiconductor component isbroken out, and these splinters may cause damage to the semiconductorcomponent. A further drawback is that the thickness of the bars usuallyhas to be defined by time-controlled etching during the opening up ofthe semiconductor components.

[0005] The present invention is therefore based on the object ofproposing a possible way of eliminating the above-mentioned drawbacks.

SUMMARY OF THE INVENTION

[0006] According to the invention, this object is achieved by thesemiconductor components in a wafer assembly in which the components areconnected to a frame by means of in each case one holder and are formedfrom the same silicon wafer, wherein the holder on one side connects therespective component to the frame and has a desired breaking point andby a method for fabricating semiconductor components havingsemiconductor components which are connected to a frame by holder meansand are formed from the same silicon wafer, comprising the followingsteps: photolithographic patterning of the wafer back surface with aholder on one side, wherein the holder connects the semiconductorcomponent to the frame; producing a desired breaking point on the holderby means of an etching operation between the frame and the semiconductorcomponent; and opening up the semiconductor component and the frame byphotolithographic patterning of the wafer front surface or back surfacewith subsequent chemical etching for shaping.

[0007] Accordingly, the semiconductor components in a wafer assemblyhave a holder which connects the respective component to the frame onone side and has a desired breaking point. In principle, this desiredbreaking point may be designed in various ways in the form of a thinningof the material in the region of the holder. The desired breaking pointis advantageously formed by a groove between the frame and thecomponent, which is preferably of V-shaped design. According to apreferred embodiment, the surfaces of the V-groove form (111) crystalplanes. According to the method, a single-sided holder is produced,which holder in each case connects the component to the frame, byphotolithographic patterning of the wafer back surface with subsequentetching of a groove in a region in which the frame has a thickenedportion. The opening up of the component and of the frame is effected byphotolithographic patterning of the wafer front surface and/or backsurface with subsequent dry or wet chemical etching processes forshaping. If the process sequence is selected in a suitable way, theopening-up operation may take place at the same time as the fabricationof the holder.

[0008] The production of the desired breaking point may in principle beeffected by means of a known etching operation, in which, according to apreferred configuration of the method, the V-groove is produced by wetchemical anisotropic etching.

[0009] The last of the three method steps mentioned above in connectionwith the opening up corresponds to the measures which are also employedin the prior art and is generally known. However, the lithographicpatterning of the single-sided holder takes place on the wafer backsurface. Therefore, the fabrication of the holder is completelyindependent of the processing of the wafer front surface. The cut edgeof the converging crystallographic (111) planes of the V-grooveaccording to a preferred configuration defines a desired breaking edge.The application of pressure to a component leads to the componenttilting and therefore to the semiconductor component breaking out of theframe along the desired breaking edge. The result is the formation of adefined broken edge. Splintering of the silicon crystal is considerablyreduced if not completely prevented. The risk of the component beingdamaged when it is being broken out is therefore likewise considerablyreduced.

[0010] When the two surfaces of the V-groove converge, the depth etchingstops on account of the crystallographic properties of the silicon.Consequently, very simple, time independent control of the thickness ofthe desired breaking point can be achieved during production.

[0011] In principle, it is also conceivable for the holder describedabove to be provided on a plurality of sides, for example on both sidesof the semiconductor component in accordance with the prior art, but inthis case the above-described advantages relating to the breaking out ofthe semiconductor component no longer apply in the manner which has beendescribed above, and consequently the semiconductor component may onceagain be damaged.

[0012] The method provides an inexpensive way, which entails reducedscrap, of fabricating semiconductor components in a wafer assembly.

BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The invention is explained in more detail below with reference toan exemplary embodiment and in conjunction with the accompanyingdrawings, in which:

[0014]FIG. 1 shows a plan view of a semiconductor component in the.wafer assembly in accordance with the prior art;

[0015]FIG. 2 shows a plan view of a semiconductor component in the waferassembly in accordance with the invention, and

[0016]FIG. 3 shows an exemplary embodiment for fabrication of the holderof a semiconductor component in the wafer assembly in accordance withthe invention, including the individual process steps required for thispurpose.

DETAILED DESCRIPTION

[0017]FIG. 1 shows part of a silicon wafer (not shown) having a frame 1,in which the semiconductor component 2 is secured. The semiconductorcomponent 2 is connected to the frame by means of a bar 3. It can beseen from the enlarged view that the bar 3 connects the frame 1 and thesemiconductor component 2 with a certain gap, i.e. semiconductorcomponent 2 and frame 1 are spaced apart from one another.

[0018]FIG. 2 shows an arrangement corresponding to that shown in FIG. 1,but with the fabrication of the semiconductor component 2 in the frame 1having taken place using the method according to the invention. Thesemiconductor component 2 is connected on one side by means of a holder4. In this area, the holder 4 comprises a thickened portion 5 of theframe 1, so that the thickened portion 5 directly adjoins thesemiconductor component 2. As can be seen from the enlarged illustrationshown in FIG. 2, a V-groove 6, the surfaces of which converge in thesilicon in such a way that a residual wall thickness d remains, isarranged between the thickened portion 5 of the holder 4 and thesemiconductor component 2. As has already been mentioned above, thedepth etching is stopped on account of the crystallographic propertiesof the silicon and the fact that the surfaces form (111) crystal planes.Consequently, the desired breaking point can be produced in a definedway.

[0019]FIGS. 3A to 3E explain the individual process steps involved inthe fabrication of a holder for semiconductor components in the waferassembly in accordance with the invention. In this specific exemplaryembodiment, it is assumed that the processing of the component from thefront surface has already been completed. In this case, the opening upof the component may take place together with the fabrication of theholding device. This means that there is no need for additional processsteps in order to open up the component.

[0020]FIG. 3A shows a (100) silicon wafer 11, on the front surface ofwhich (corresponding to the top side in the illustration) the activesurface of the component or sensor is to be located. This silicon wafer11 is covered by a masking layer 12 on both sides. This masking layermay, for example, be a silicon oxide layer produced by oxidation or asilicon nitride layer produced by vapor deposition. In general, theymust be layers which are suitable to act as an etching mask foranisotropic silicon etching.

[0021] Then, as illustrated in FIG. 3B, a photosensitive resist 13 isapplied to the back surface of the silicon wafer 11. The mask forfabrication of the holder 4 is transferred to this resist 13 byphotolithographic patterning. Then, a resist 13 is also applied to thewafer front surface 7, in order to protect the latter, but this resistis not patterned. It is also possible to use a different resist from theresist which was applied to the wafer back surface 8.

[0022]FIG. 3C shows the next step, in which the mask structure which hasbeen transferred to the photoresist 13 is transferred to the maskinglayer 12 on the wafer back surface 8 by wet or dry chemical etchingtechniques. If the masking layer consists of silicon oxide or siliconnitride, this may be achieved by etching in dilute hydrofluoric acid.

[0023] Then, the photoresist 13 is removed again from both sides of thesilicon wafer 11. This may, for example, take place in a solvent, suchas acetone. To completely remove residues of resist, it is then possiblefor cleaning to take place in a heated mixture of sulfuric acid andhydrogen peroxide. A subsequent anisotropic silicon etching step, whichmay, for example, take place in dilute, heated potassium hydroxidesolution, causes a V-groove 6 to be etched into the silicon wafer 11.The boundary surfaces of this V-groove 6 form (111) crystal planes ofthe silicon. The depth etching stops automatically when the two (111)crystal planes meet. This is illustrated in FIG. 3D.

[0024]FIG. 3E shows a plan view of the back surface of the silicon wafer11 after the anisotropic silicon etching has ended. The shape of theetching mask 12 which is required in order to fabricate a holder 4 inaccordance with the invention can also be seen from this figure. Theetch masking located on the wafer front surface 7 is not illustrated inthis figure.

[0025] Finally, the etching masks 12 on the front and back surfaces ofthe silicon wafer 11 are removed again. If these masking layers consistof silicon oxide or silicon nitride, this can once again take place byetching in dilute hydrofluoric acid. If a silicon etching step ofsufficient length is carried out, contact between component 2 and frame1 remains only in the region of the thickened portion 5 of the frame 1which has been produced. Otherwise, the component 2 is completelyseparate from the frame 1 (cf. FIG. 2).

[0026] It is to be understood that the invention is not limited to theillustrations described and shown herein, which are deemed to be merelyillustrative of the best modes of carrying out the invention, and whichare susceptible of modification of form, size, arrangement of parts anddetails of operation. The invention rather is intended to encompass allsuch modifications which are within its spirit and scope as defined bythe claims.

1. A wafer assembly comprises a frame, at least one semiconductorcomponent, holder means for connecting the at least one semiconductorcomponent to the frame wherein the holder means and the semiconductorcomponent are formed of the same material, the holder means has one endconnected to the frame and is provided with a desired breaking point. 2.The wafer assembly as claimed in claim 1, wherein the holder means has alarge-area thickened portion connected to the frame and the desiredbreaking point is formed by a groove between the frame and thesemiconductor component.
 3. The wafer assembly as claimed in claim 2,wherein the groove is of V-shaped design.
 4. The wafer assembly asclaimed in claim 3, wherein the groove has surfaces which form crystalplanes. 5-9. (canceled)